Exponential extended flash time-to-digital converter

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dc.contributor.author Chen, Peng
dc.contributor.author Staszewski, Robert Bogdan
dc.date.accessioned 2017-11-09T16:12:27Z
dc.date.available 2017-11-09T16:12:27Z
dc.date.copyright 2016 IEEE en
dc.date.issued 2016-06-15
dc.identifier.uri http://hdl.handle.net/10197/9038
dc.description IEEE International Nordic-Mediterranean Workshop on Time-to-Digital Converters and Applications (NoMe - TDC 2016), Krakow, Poland, June, 2016 en
dc.description.abstract The digital-to-time converter (DTC)-based all- digital phase locked loop (ADPLL) attracts more and more attention due to its ultra-lower power consumption characteristic [1]. With DTC, the time-to-digital converter's (TDC) requirements are relaxed, not only for its range but also for its nonlinearity. However, the shortened TDC range, which is less than one digital controlled oscillator (DCO) output period in the new architecture makes the settling time longer and the TDC gain calibration difficult. This work introduces a technique to extend the TDC range by 16 times to accelerate the settling process, while the extended part can be disabled when ADPLL is in lock. Furthermore, the TDC gain calibration is easier. en
dc.description.sponsorship Science Foundation Ireland en
dc.language.iso en en
dc.publisher IEEE en
dc.relation.ispartof Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP) en
dc.rights © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works en
dc.subject DLL en
dc.subject TDC en
dc.subject Two stages en
dc.subject DTC-based ADPLL en
dc.subject Exponential en
dc.title Exponential extended flash time-to-digital converter en
dc.type Conference Publication en
dc.internal.authorcontactother robert.staszewski@ucd.ie
dc.status Peer reviewed en
dc.identifier.doi 10.1109/EBCCSP.2016.7605281
dc.neeo.contributor Chen|Peng|aut|
dc.neeo.contributor Staszewski|Robert Bogdan|aut|
dc.internal.rmsid 724456588
dc.date.updated 2017-07-10T23:14:58Z

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