In this paper, we derive linearized discrete-time models of higher order Charge-Pump Phase-Locked Loops (CPPLLs). The behaviour of CP-PLLs in the steady state is analysed
and an important feature is developed. The nonlinear ...
This paper examines the nonlinear dynamics of an
alias-locked loop (ALL) which uses an aliasing divider instead of
a traditional frequency divider in the feedback loop of a phaselocked
loop. A nonlinear model of the ALL ...